What are the layout considerations when co-locating a crystal oscillator with the PLL?

The objective is to avoid adding any noise to the clock between the oscillator and PLL input pin. Below are some guidelines when co-locating the oscillator with the PLL.
1. Connect the oscillator directly to the PLL and avoid using a buffer; if a buffer must be used, select a technology that will add as little noise as possible.
2. Minimize the oscillator's output clock signal trace length, as the oscillator output is single ended and thereby vulnerable to crosstalk.
3. Provide an option for a series termination resistor at the oscillator output, in case impedance matching is required to eliminate signal over/undershoot.
Refer to application note AN-807 for more details. For other questions not addressed by the Knowledge Base, please submit a technical support request.

Documents

Title Other Languages Type Format File Size Date
Application Notes & White Papers
AN-807 Recommended Crystal Oscillators for NetSynchro WAN PLL Application Note PDF 77 KB Oct 27, 2016