What are the steps to program the WDCO normal offset PLL's for IDT's UFT3G devices?

Use the following steps to program the WDCO offset. Instructions for PLL0 and PLL1 are included. Program only the applicable
PLL.
1) Lock the device to the XTAL input.
 
2) Make sure that the DPLL settings are set as follows:
DPLL0 Powered up: Register 0xB8 bit2=1
DPLL1 Powered up: Register 0xB8 bit3=1 (if applicable).
DSM_ORD0=3 (Register 0x3A, bits 6 and 7, for PLL0)
DSM_ORD1=3(Register 0x6D, bits 6 and 7, for PLL1, if applicable).
STATEx can be in any of the four states.
 
3) Program the “WDCOx NRMOFF” registers.
The WDCO offset will now be observed as a ppm offset on the output.
 
Refer to application note AN-870 for more details. For other questions not addressed by the knowledge base, please submit a technical support request

Documents

Title Other Languages Type Format File Size Date
Application Notes & White Papers
AN-870 UFT3G Frequency Tuning Application Note PDF 835 KB Nov 5, 2014