The 8S89831I is a high speed 1-to-4 Differential-to-LVPECL/ECL Fanout Buffer. The 8S89831I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVDS, LVHSTL and CML to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin which may be useful for system test and debug purposes. The 8S89831I is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications.

特長

  • Four LVPECL/ECL outputs
  • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
  • 50Ω internal input termination to VT
  • Output frequency: >2.1GHz
  • Output skew: 30ps (maximum)
  • Part-to-part skew: 185ps (maximum)
  • Additive phase jitter, RMS: 0.31ps (typical)
  • Propagation Delay: 570ps (maximum)
  • LVPECL mode operating voltage supply range: VCC = 2.5V±5%, 3.3V±5%, VEE = 0V
  • ECL mode operating voltage supply range: VCC = 0V, VEE = -3.3V±5%, -2.5V±5%
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

製品選択

発注型名 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type パッケージ 購入/サンプル
8S89831AKILF Active VFQFPN 16 I はい Tube Package Info
Availability
8S89831AKILFT Active VFQFPN 16 I はい Reel Package Info
Availability

ドキュメント&ダウンロード

タイトル 他の言語 分類 形式 サイズ 日付
データシート
8S89831I Datasheet Datasheet PDF 550 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : TB1912-02(R1) Convert Shipping Media
from Tube or Tray to Cut Reel
Product Change Notice PDF 5.71 MB
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
Product Change Notice PDF 5.61 MB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1807-01 Gold wire to Copper Wire Product Change Notice PDF 32 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
Downloads
ICS8s89831I IBIS Model Model - IBIS ZIP 76 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications (Japanese) English Product Brief PDF 6.27 MB
IDT Products for Radio Applications (Japanese) English Product Brief PDF 6.27 MB
IDT Clock Generation Overview (Japanese) English Overview PDF 2.19 MB
IDT Clock Distribution Overview (Japanese) English Overview PDF 7.79 MB
IDT Clock Generation Overview (Japanese) English Overview PDF 2.19 MB
IDT Clock Distribution Overview (Japanese) English Overview PDF 7.79 MB
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB