This is the evaluation board for the IDT 5P49V6967 VersaClock 6E programmable clock generator. With RMS phase jitter of less than 0.5ps over the full 12kHz to 20MHz integration range, the device meets the stringent jitter requirements of PCI Express® Gen 1/2/3, USB 3.0, and 1G/10G Ethernet.  
 

特長

  • 3 differential outputs capable of generating any output frequency using  IDT Timing Commander™ software
  • 4 additional copies of LP-HCSL outputs
  • SMA connectors for outputs
  • When the board is connected to a PC running IDT Timing Commander Software through USB, the device can be configured and programmed to generate frequencies with best-in-class performance
  • The 25MHz crystal installed on the board can source a reference frequency to the device when CLKIN/CLKINB is not used

製品選択

発注型名 Output Signaling Part Status パッケージ 購入/サンプル
5P49V6967-EVK HCSL, LVCMOS, LVDS, LVPECL Active Package Info
Availability

ドキュメント&ダウンロード

タイトル 他の言語 分類 形式 サイズ 日付
ユーザーガイド
VersaClock 6E Family Register Descriptions and Programming Guide Manual - User Reference PDF 872 KB
5P49V6967 and 5P49V6968 Evaluation Board Manual Manual PDF 1.04 MB