The 9DBL0653 Zero-Delay/Fanout buffer is a low-power high-performance member of Reneas' Full-Featured PCIe family. The buffer supports PCIe Gen1–5 and provides a Loss of Signal (LOS) indicator. The device is an easy upgrade from the 9DBL0651.
For information regarding evaluation boards and material, please contact your local sales representative.
- Loss of Signal (LOS) output; supports fault tolerant systems
- Supports PCIe Gen1–5 CC and IR in fanout mode
- Supports PCIe Gen1–5 CC in High Bandwidth ZDB mode
- Direct connection to 85Ω transmission lines; saves 24 resistors compared to standard PCIe devices
- Spread spectrum tolerant; allows reduction of EMI
- Pin/SMBus selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
- Easy AC-coupling to other logic families, see application note AN-891.
- Space saving 5 × 5 mm 40-VFQFPN; minimal board space