The 83052I-01 is a 2-bit, 2:1, Single-ended Multiplexer and a member of the family of High Performance Clock Solutions from IDT. The 83052I-01 has two selectable single-ended clock inputs and two single-ended clock outputs. The output has a VDDO pin which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage translation applications. An output enable pin places the output in a high impedance state which may be useful for testing or debug. Possible applications include systems with up to two transceivers which need to be independently set for different rates. For example, a board may have two transceivers, each of which need to be independently configured for 1 Gigabit Ethernet or 1 Gigabit Fibre Channel rates. Another possible application may require the ports to be independently set for FEC (Forward Error Correction) or non-FEC rates. The device operates up to 250MHz and is packaged in a 16 TSSOP.

Features

  • 2-bit, 2:1 single-ended multiplexer
  • Nominal output impedance: 15Ω (VDDO = 3.3V)
  • Maximum output frequency: 250MHz
  • Propagation delay: 3ns (maximum), VDD = VDDO = 3.3V
  • Input skew: 85ps (maximum), VDD = VDDO = 3.3V
  • Part-to-part skew: 500ps (maximum), VDD = VDDO = 3.3V
  • Output skew: 65ps (maximum), VDD = VDDO = 3.3V
  • Additive phase jitter, RMS (12KHz - 20MHz): 0.15ps (typical)
  • Operating supply modes:
    VDD/VDDO
    3.3V/3.3V
    3.3V/2.5V
    3.3V/1.8V
    2.5V/2.5V
    2.5V/1.8V
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
83052AGI-01LF Active PGG16 TSSOP 16 I Yes Tube
Availability
83052AGI-01LFT Active PGG16 TSSOP 16 I Yes Reel
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
83052I-01 Final Data Sheet Datasheet PDF 401 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16 Product Change Notice PDF 663 KB
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 363 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 209 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Boards & Kits