NOTICE - The following device(s) are recommended alternatives:

The 8534I-13 is a low skew, high performance 1-to-4 Crystal Oscillator/LVCMOS-to-3.3V LVPECL/ LVCMOS fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The 8534I-13 has selectable single ended clock or crystal inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. The output enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8534I-13 ideal for those applications demanding well defined performance and repeatability.


  • One differential 3.3V LVPECL outputs, and three single ended 2.5V LVCMOS outputs
  • Selectable LVCMOS/LVTTL CLK or crystal inputs
  • CLK can accept the following input levels: LVCMOS, LVTTL
  • Crystal frequency: 25MHz
  • Maximum output frequency: 266MHz
  • Output skew: 55ps (typical)
  • Part-to-part skew: 800ps (typical)
  • Propagation delay: 3.3ns (typical)
  • Additive phase jitter, RMS: 0.16ps (typical)
  • LVPECL output, 3.3V operating supply LVCMOS output, 2.5V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in both standard (RoHS 5) and lead-free RoHS 6) packages

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8534BMI-13LF Obsolete DCG16 SOIC 16 I Yes Tube
8534BMI-13LFT Obsolete DCG16 SOIC 16 I Yes Reel

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8534I-13 Datasheet Datasheet PDF 215 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PDN# : CQ-17-04(R1) Product Discontinuance Notice Product Discontinuation Notice PDF 606 KB
PDN# : CQ-17-04 Product Discontinuance Notice Product Discontinuation Notice PDF 599 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB