The 859S0212I is a 2:2 Differential-to-LVPECL/ LVDS Clock Multiplexer which can operate up to 3GHz. The 859S0212I has 2 selectable differential PCLKx, nPCLKx clock inputs. The PCLKx, nPCLKx input pairs can accept LVPECL, LVDS, CML or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The clock select pin has an internal pulldown resistor.

Features

  • High speed 2:1 differential multiplexer with a 1:2 fanout buffer
  • Two differential LVPECL or LVDS output pairs
  • Two selectable differential PCLKx, nPCLKx input pairs
  • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
  • Maximum output frequency: 3GHz
  • Translates any single ended input signal to LVPECL levels with resistor bias on nPCLKx input
  • Part-to-part skew: 25ps (typical)
  • Propagation delay: 555ps (typical)
  • Additive phase jitter, RMS: 0.16ps (typical)
  • Full 3.3V or 2.5V supply modes
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
859S0212BGILF Active PGG16 TSSOP 16 I Yes Tube
Availability
859S0212BGILFT Active PGG16 TSSOP 16 I Yes Reel
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
859S0212I Final Data Sheet Datasheet PDF 1021 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16 Product Change Notice PDF 663 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Downloads
859S0212I IBIS Model Model - IBIS ZIP 142 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Boards & Kits