The 8L30110 is a low skew, 1-to-10 LVCMOS / LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. 

The 8L30110 is characterized at full 3.3V and 2.5V, mixed 3.3V/2.5V, 3.3V/1.8V, 3.3V/1.5V, .5V/1.8V and 2.5V/1.5V output operating supply modes. The input clock is selected from two differential clock inputs or a crystal input. The differential input can be wired to accept a single-ended input. The internal oscillator circuit is automatically disabled if the crystal input is not selected.

Features

  • Ten LVCMOS / LVTTL outputs up to 200MHz
  • Differential input pair can accept the following differential input levels: LVPECL, LVDS, HCSL
  • Crystal Oscillator Interface
  • Crystal input frequency range: 8MHz to 50MHz
  • Output skew: 63ps (typical)
  • Additive RMS phase jitter: 22fs (typical)
  • Power supply modes:
    Core / Output
    3.3V / 3.3V
    3.3V / 2.5V
    3.3V / 1.8V
    3.3V / 1.5V
    2.5V / 2.5V
    2.5V / 1.8V
    2.5V / 1.5V
  • • -40°C to 85°C ambient operating temperature
  • • Lead-free (RoHS 6) packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8L30110NLGI Active NLG32P1 VFQFPN 32 I Yes Tray
Availability
8L30110NLGI8 Active NLG32P1 VFQFPN 32 I Yes Reel
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
8L30110 Datasheet Datasheet PDF 707 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCNs & PDNs
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB

Boards & Kits