NOTICE - The following device(s) are recommended alternatives:

The 8T79S818I-08 is a high performance, 1-to-8, differential input to universal output clock divider and fanout buffer. The device is designed for frequency-division and signal fanout of high-frequency clock signals in applications requiring four different output frequencies generated simultaneously. Each bank of two outputs has a selectable divider value of ÷1 through ÷6 and ÷8. The 8T79S818I-08 is optimized for 3.3 V and 2.5 V supply voltages and a temperature range of -40°C to 85°C. The device is packaged in a space-saving 32 lead VFQFN package.


  • Four banks of two low skew outputs 
  • Selectable bank output divider values: ÷1 through ÷6 and ÷8
  • One differential PCLK, nPCLK input
  • PCLK, nPCLK input pair can accept the following differential input levels: LVPECL, LVDS or CML levels
  • Maximum input frequency: 1.5GHz 
  • LVCMOS control inputs
  • QXx ÷1 edge aligned to QXx ÷n edge
  • Individual output divider control via serial interface
  • Individual output enable/disable control via serial interface
  • Individual output type control, LVDS or LVPECL, via serial interface
  • 2.375 V to 3.465 V supply voltage operation
  • -40°C to 85°C ambient operating temperature
  • Lead-free (RoHS 6) packaging
  • Supported by IDT's Timing Commander Software

Product Options

Orderable Part ID Part Status Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete 32 I Yes Tray
Obsolete 32 I Yes Reel

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
IDT8T79S818I-08 Datasheet Datasheet PDF 897 KB
User Guides & Manuals
Timing Commander Installation Guide Guide PDF 497 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PDN# : CQ-17-04(R1) Product Discontinuance Notice Product Discontinuation Notice PDF 606 KB
PDN# : CQ-17-04 Product Discontinuance Notice Product Discontinuation Notice PDF 599 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
Timing Commander Installer (v1.16.3) Software ZIP 19.85 MB
8T79S818I-08 IBIS Model Model - IBIS ZIP 188 KB
Clock Distribution Overview 日本語 Overview PDF 217 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB
8T79S818i-08 Timing Commander File Engineering TCP 896 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB