The 9SBV0802 provides two banks of four 1.05V LVCMOS outputs. Each bank has its own input. There are three OE pins. Two OE pins control two outputs each and one OE pin controls four outputs. One 9SBV0802 allows one PCH to easily support four CPU's with point to point routing of the PM signals. Two 9SBV0802 devices allow one PCH to easily support up to eight CPU's with point-to-point routing of the PM signals.


  • Eight 1–48MHz 1.05V LVCMOS outputs
  • Additive cycle-to-cycle jitter < 8ps
  • Output-to-output skew within a bank < 50ps
  • Output-to-output skew between banks < 100ps
  • 1.8V power supply, 15mW typical power consumption
  • Three OE pins
  • 1.05V LVCMOS inputs with VREF pin
  • Space saving 4 x 4 mm 20-VFQFPN

Product Options

Orderable Part ID Part Status Pkg. Type Lead Count (#) Temp. Grade Temp. Range Carrier Type Package Buy Sample
9SBV0802AKILF Active VFQFPN 20 I -40 to 85°C Tube Package Info
9SBV0802AKILFT Active VFQFPN 20 I -40 to 85°C Reel Package Info

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
9SBV0802 Datasheet Datasheet PDF 280 KB
Application Notes & White Papers
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
Product Change Notice PDF 5.61 MB
9SBV0802 IBIS Model Model - IBIS ZIP 15 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview Overview PDF 252 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB