The 8A34041 Multichannel Digital PLL / Digitally Controlled Oscillator (DPLL/DCO) provides tools to manage timing references, clock conversion and timing paths for common communications protocols such as: Synchronous Ethernet (SyncE), Optical Transport Network (OTN) and Common Public Radio Interface (CPRI).  The device can be used to synchronize communication ports on line cards or daughter cards that are connected with synchronization sources across backplanes or other media. Digitally Controlled Oscillators (DCOs) are available to be controlled by OTN clock recovery servo software running on an external processor. Digital PLLs (DPLLs) support filtering of gapped clocks for OTN; and hitless reference switching between references from redundant timing sources. The device supports multiple independent timing channels for: clock generation; jitter attenuation and universal frequency translation.  Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed.  The device outputs ultra-low-jitter clocks that can directly synchronize SERDES running at up to 28Gbps; as well as CPRI/OBSAI, SONET/SDH and PDH interfaces.

To see other devices in this product family, visit the ClockMatrix Timing Solutions page.

Features

  • Eight independent timing channels
  • Jitter output below 150fs RMS (typical)
  • Digital PLLs (DPLLs) lock to any frequency from 1kHz to 1GHz
  • DPLLs / Digitally Controlled Oscillators (DCOs) generate any frequency from 0.5Hz to 1GHz
  • DCO outputs can be aligned in phase and frequency with the outputs of any DPLL or DCO
  • Supports up to 8 differential; or 16 single-ended reference clock inputs
  • Supports up to 12 differential outputs; or 24 LVCMOS outputs
  • Reference monitors qualify/disqualify references depending on LOS, activity, frequency monitoring and/or LOS input pins
  • Automatic reference selection state machines select the active reference for each DPLL based on the reference monitors, priority tables, revertive / non-revertive and other programmable settings
  • Device requires a crystal oscillator or fundamental-mode crystal: 25MHz to 54MHz
  • Optional XO_DPLL input allows a wider range for XO, TCXO or OCXO frequencies from 1MHz to 150MHz for applications that require a local oscillator with high stability
  • Serial processor ports support 1MHz I2C or 50MHz SPI
  • The device can configure itself automatically after reset via:
    • Internal Customer-programmable One-Time Programmable memory 
    • Standard external I2C EPROM via separate I2C Master Port

Product Options

Orderable Part ID Part Status Pkg. Code Temp. Range Carrier Type Buy Sample
8A34041C-000AJG Active AJG144D1 -40 to 85°C Tray
Availability
8A34041C-000AJG8 Active AJG144D1 -40 to 85°C Reel
Availability
8A34041B-000AJG Active AJG144 -40 to 85°C Tray
Availability
8A34041B-000AJG8 Active AJG144 -40 to 85°C Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8A34041 Datasheet Datasheet PDF 1.30 MB
8A3xxxx Family Errata (Rev B with Update v4.7) Errata PDF 127 KB
User Guides & Manuals
8A3xxxx Family Programming Guide (v4.8) Guide PDF 3.32 MB
8A34xxx 144BGA EVK User Manual Manual - Eval Board PDF 2.53 MB
ClockMatrix GUI Step-by-Step User Guide Guide PDF 4.98 MB
8A3xxxx Family Programming Guide (v4.7) Guide PDF 3.31 MB
Application Notes & White Papers
AN-1030 CM Input/Input-to-Output/Output Phase Adjustment Application Note PDF 864.15 MB
AN-1020 ClockMatrix on nCXO Redundancy Application Note PDF 530 KB
AN-1010 ClockMatrix Time-to-Digital Converter Application Note PDF 1.54 MB
AN-950 82P338XX/9XX Usage of a SYNC Input for Clock Alignment Application Note PDF 175 KB
PCNs & PDNs
PCN# : TP1906-05 Correct System APLL Loss-of-Lock Issue Product Change Notice PDF 123 KB
PCN#: TP1902-02 ROM Update for ClockMatrix Products Product Change Notice PDF 435 KB
Other
8A3x0xx Schematic Checklist (v1.22) Miscellaneous XLSX 328 KB
ClockMatrix Family Overview Overview PDF 241 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
ClockMatrix 144-BGA Devices Evaluation Board Schematic v1.1 Schematic PDF 288 KB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
Timing Commander Personality File for ClockMatrix 8A340xx (v7.7.0, FWv4.7.0) Software ZIP 39.35 MB
Timing Commander Installer (v1.15.0.27471) Software ZIP 19.57 MB
EEPROM_Image_PR4.7_Part=24xx1025_Address=0x50-0x54 Software ZIP 177 KB
EEPROM_Image_PR4.7_Part=24xx1024_Address=0x50-0x51 Software ZIP 177 KB
ClockMatrix Register Header Files v4.7 Software ZIP 293 KB
8A340x1 BSDL Model Model - BSDL BSDL 15 KB
8A340xx Clock Matrix IBIS Model Model - IBIS ZIP 2.40 MB
ClockMatrix BGA-144 Delphi Thermal Model with 1W Power Model - Thermal PDML 3 KB
ClockMatrix BGA-144 2-Resistor Thermal Model with 1W Power Model - Thermal PDML 2 KB