The steps for measuring the negative resistance of the active network are as follows:
1) Compute crystal parameters Co, Cs, Ls, Rs and CL using a Network Analyzer such as 250B/C by Saunders and Associated Inc.
2) Solder crystal on X1 and X2 pins of the IDT clock IC and mount the crystal load capacitors next to the device pins (as shown in the figure below).
3) Adjust the load capacitance to get the output frequency error to nearly 0ppm (account for contribution due to stray capacitance on the PCB board).
4) Connect a series resistor Rx (as shown in Figure 2) and keep increasing its value until oscillations stop occurring on powering up the device.
5) The negative resistance of the active network is then equal to Rx + Rs.
Refer to application note AN-802 for more details. For questions not answered by the Knowledge Base, please submit a technical support request.