The figure below shows how a differential input can be wired to accept single-ended levels. The reference voltage Vref = VCC/2 is generated by the bias resistors R1 and R2. The bypass capacitor (C1) is used to help filter noise on the DC bias. This bias circuit should be located as close to the input pin as possible. The ratio of R1 and R2 might need to be adjusted to position the Vref in the center of the input voltage swing. For example, if the input clock swing is 2.5V and VCC = 3.3V, R1 and R2 value should be adjusted to set Vref at 1.25V. The values below are for when both the single ended swing and Vcc are at the same voltage. This configuration requires that the sum of the output impedance of the driver (Ro) and the series resistance (Rs) equals the transmission line impedance. Refer to application note AN-836 for more details. For other questions not addressed by the Knowledge Base, please submit a technical support request.



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Application Notes & White Papers
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB