The 181-51 generates a low EMI output clock from a clock or crystal input. The device uses IDT's proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The 181-51 offers center spread selection of +/-0.625% and +/-1.875%. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. IDT offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board.

Features

  • Pin and function compatible to Cypress W181-51
  • Packaged in 8-pin SOIC
  • Provides a spread spectrum output clock
  • Accepts a clock input and provides same frequency dithered output
  • Input frequency of 28 to 75 MHz for Clock input
  • Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics
  • Spread percentage selection for +/-0.625% and +/-1.875%
  • Operating voltage of 3.3 V and 5 V
  • Advanced, low-power CMOS process

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
181M-51LF Obsolete DCG8 SOIC 8 C Yes Tube
Availability
181M-51LFT Obsolete DCG8 SOIC 8 C Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
181-51 Datasheet Datasheet PDF 204 KB
アプリケーションノート、ホワイトペーパー
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AN-815 Understanding Jitter Units Application Note PDF 565 KB
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PCN / PDN
PDN# CQ-14-05 MARKET DECLINED PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 192 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
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