The 9DBL411 is a 4-Output lower power differential buffer. Each output has its own OE# pin. It has a maximum operating frequency of 150 MHz.

Features

  • 4 - low power differential output pairs
  • Individual OE# control of each output pair
  • Output cycle-cycle jitter < 25 ps additive
  • Output to output skew: < 50 ps
  • Low power differential fanout buffer for PCIExpress and CPU clocks
  • 20-pin MLF or TSSOP packaging

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
9DBL411AGLF Active PGG20 TSSOP 20 C Yes Tube
Availability
9DBL411AGLFT Active PGG20 TSSOP 20 C Yes Reel
Availability
9DBL411AKLF Active NLG20P1 VFQFPN 20 C Yes Tube
Availability
9DBL411AKLFT Active NLG20P1 VFQFPN 20 C Yes Reel
Availability
9DBL411BGILF Active PGG20 TSSOP 20 I Yes Tube
Availability
9DBL411BGILFT Active PGG20 TSSOP 20 I Yes Reel
Availability
9DBL411BGLF Active PGG20 TSSOP 20 C Yes Tube
Availability
9DBL411BGLFT Active PGG20 TSSOP 20 C Yes Reel
Availability
9DBL411BKILF Active NLG20P1 VFQFPN 20 I Yes Tube
Availability
9DBL411BKILFT Active NLG20P1 VFQFPN 20 I Yes Reel
Availability
9DBL411BKLF Active NLG20P1 VFQFPN 20 C Yes Tube
Availability
9DBL411BKLFT Active NLG20P1 VFQFPN 20 C Yes Reel
Availability

Documentation & Downloads

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
9DBL411B Datasheet Datasheet PDF 123 KB
9DBL411A Datasheet Datasheet PDF 121 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT?s ?Universal? Low-Power HCSL Outputs Application Note PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 235 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB
PCN# : A1305-01 Gold Wire to Copper Wire Product Change Notice PDF 148 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Downloads
9DBL411B IBIS Model Model - IBIS ZIP 7 KB
9DBL411A IBIS Model - IBIS ZIP 7 KB
その他資料
PCI Express Timing Solutions Overview Overview PDF 275 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB

Boards & Kits