The 9ZML1232E is a second generation 2-input/12-output differential mux for Intel Purley and newer platforms. It exceeds the demanding DB1200ZL performance specifications and is backwards compatible to the 9ZML1232B. It utilizes Low Power HCSL-compatible outputs to reduce power consumption and termination resistors. It is suitable for PCI-Express Gen1-4 or QPI/UPI applications, and provides 2 configurable low-drift I2O settings, one for each input channel, to allow I2O tuning for various topologies.

Features

  • 2 configurable low-drift I2O delays up to 2.9ns; maintain transport delay for various topologies
  • LP-HCSL outputs; eliminate 24 resistors
  • 9 selectable SMBus addresses; multiple devices can share same SMBus segment
  • Separate VDDIO for outputs; allows maximum power savings
  • PLL or Bypass Mode; PLL can dejitter incoming clock
  • Hardware or software-selectable PLL BW; minimizes jitter peaking in downstream PLLs
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • SMBus interface; software can modify device settings without hardware changes
  • 10 x 10 mm 72-QFN package; small board footprint

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
9ZML1232EKILF Active NLG72P1 VFQFPN 72 I Yes Tray
Availability
9ZML1232EKILFT Active NLG72P1 VFQFPN 72 I Yes Reel
Availability

Documentation & Downloads

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
9ZML1232E_1252E Datasheet Datasheet PDF 398 KB
アプリケーションノート、ホワイトペーパー
AN-1001 Combining PhiClock? and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 244 KB
AN-975 Cascading PLLs Application Note PDF 255 KB
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT?s ?Universal? Low-Power HCSL Outputs Application Note PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 235 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-808 PCI Express/HCSL Termination Application Note PDF 137 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : TP1910-03-R1 Update the Cut-off Date Code Product Change Notice PDF 163 KB
PCN# : TP1910-03 Top Metal Change Product Change Notice PDF 158 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
Downloads
9ZML1232E IBIS Model Model - IBIS ZIP 22 KB
その他資料
PCI Express Timing Solutions Overview Overview PDF 275 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB

Boards & Kits

Part Number Title Type Company
EVK9ZXL1951D Evaluation Kit for 19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI