The 9ZXL0652E is a second-generation, enhanced-performance DB800ZL differential buffer. The part is functionally compatible to the 9ZXL0652A, while offering a much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications. The 9ZXL0652E has an SMBus Write Lockout pin for increased device and system security.
 

Features

  • SMBus write lock feature; increases system security
  • PCIe Gen 1–5 compliance
  • LP-HCSL outputs with 85Ω Zout; eliminate 24 resistors, save 48mm² of area
  • 6 OE# pins; hardware control of each output
  • Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
  • Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • 100MHz PLL Mode; UPI support
  • 5 × 5 mm 40-VFQFPN package; small board footprint

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
9ZXL0652EKILF Active NDG40P2 VFQFPN 40 I Yes Tray
Availability
9ZXL0652EKILFT Active NDG40P2 VFQFPN 40 I Yes Reel
Availability

Documentation & Downloads

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
9ZXL06x2E-9ZXL08x2E-9ZXL12x2E Family Datasheet Datasheet PDF 487 KB
アプリケーションノート、ホワイトペーパー
AN-1001 Combining PhiClock? and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 244 KB
AN-975 Cascading PLLs Application Note PDF 255 KB
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT?s ?Universal? Low-Power HCSL Outputs Application Note PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 235 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-808 PCI Express/HCSL Termination Application Note PDF 137 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
Downloads
9ZXL0652E IBIS Model Model - IBIS ZIP 19 KB
その他資料
PCI Express Timing Solutions Overview Overview PDF 275 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB

Boards & Kits

Part Number Title Type Company
EVK9ZXL1951D Evaluation Kit for 19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI