NOTICE - The following device(s) are recommended alternatives:

The 85222 is a Dual LVCMOS / LVTTL-to- Differential LVHSTL Translator. The 85222 has two single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translates them to LVHSTL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important. For optimum performance, both output pairs need to be terminated, even if one output pair is unused.

Features

  • 2 differential LVHSTL outputs
  • Selectable CLK0, CLK1 LVCMOS clock inputs
  • CLK0 and CLK1 can accept the following input levels: LVCMOS or LVTTL
  • Maximum output frequency: 350MHz
  • Part-to-part skew: 350ps (maximum)
  • Propagation delay: 1.3ns (maximum)
  • VOH: 1.2V (maximum)
  • 3.3V and 2.5V operating supply
  • 0°C to 70°C ambient operating temperature
  • Industrial temperature information available upon request
  • Lead-Free package fully RoHS compliant

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
85222AMLF Obsolete DCG8 SOIC 8 C Yes Tube
Availability
85222AMLFT Obsolete DCG8 SOIC 8 C Yes Reel
Availability

Documentation & Downloads

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
85222 Datasheet Datasheet PDF 250 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PDN# : CQ-15-03 Quarter PDN for Declined Market Product Discontinuation Notice PDF 542 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Downloads
85222 IBIS Model Model - IBIS ZIP 6 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB