The 853S310I is a low skew, high performance 1-to-8 Differential-to-3.3V LVPECL/ECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept LVPECL, LVDS, CML and SSTL differential input levels. The 853S310I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 853S310I ideal for those clock distribution applications demanding well defined performance and repeatability.

Features

  • Eight differential 3.3V LVPECL/ECL outputs
  • Two selectable differential input pairs
  • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
  • Maximum output frequency: 2GHz
  • Translates any single-ended input signal to 3.3V LVPECL levels with resistor bias on nPCLKx input
  • Output skew: 20ps (typical)
  • Propagation delay: 825ps (typical)
  • Additive phase jitter, RMS: 0.14ps (typical)
  • LVPECL mode operating voltage supply range: VCC = 3.0V to 3.8V, VEE = 0V
  • ECL mode operating voltage supply range: VCC = 0V, VEE = -3.0V to -3.8V
  • -40°C to 85°C ambient operating temperature
  • Available lead-free (RoHS 6) package

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
853S310CVILF Active PLG28 PLCC 28 I Yes Tube
Availability
853S310CVILFT Active PLG28 PLCC 28 I Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
ICS853S310I DATASHEET Datasheet PDF 937 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN#: A1309-03 Additional Assembly Sources Product Change Notice PDF 398 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB

ソフトウェア/ツール

タイトル 他の言語 タイプ 形式 サイズ 日付
ICS853S310I IBIS Model Model - IBIS ZIP 39 KB