The 889474 is a high speed 2-to-1 differential multiplexer with integrated 2 output LVDS fanout buffer and internal termination and is a member of the family of high performance clock solutions from IDT. The 889474 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pins allow other differential signal families such as LVPECL, LVDS, LVHSTL and CML to be easily interfaced to the input with minimal use of external components. The 889474 is packaged in a small 4mm x 4mm 24-pin VFQFN package which makes it ideal for use in space-constrained applications.

特長

  • Two differential LVDS outputs
  • INx, nINx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, CML
  • 50? internal input termination to VT
  • Maximum output frequency: 2GHz (maximum)
  • Additive phase jitter, RMS: 0.06ps (typical)
  • Output skew: 20ps (maximum)
  • Propagation delay: 700ps (maximum)
  • 2.5V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free RoHS-complaint package

製品選択

発注型名 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
Obsolete VFQFPN 24 C はい Tube
Availability
Obsolete VFQFPN 24 C はい Reel
Availability

ドキュメント&ダウンロード

タイトル 他の言語 分類 形式 サイズ 日付
データシート
889474 Final Data Sheet データシート PDF 299 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL アプリケーションノート PDF 322 KB
AN-846 Termination - LVDS アプリケーションノート PDF 133 KB
AN-844 Termination - AC Coupling Clock Receivers アプリケーションノート PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection アプリケーションノート PDF 495 KB
AN-840 Jitter Specifications for Timing Signals アプリケーションノート PDF 442 KB
AN-834 Hot-Swap Recommendations アプリケーションノート PDF 153 KB
AN-833 Differential Input Self Oscillation Prevention アプリケーションノート PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels アプリケーションノート PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced アプリケーションノート PDF 160 KB
AN-827 Application Relevance of Clock Jitter アプリケーションノート PDF 1.15 MB
AN-815 Understanding Jitter Units アプリケーションノート PDF 565 KB
AN-805 Recommended Ferrite Beads アプリケーションノート PDF 121 KB
PCN / PDN
PCN# : TB1912-02(R1) Convert Shipping Media
from Tube or Tray to Cut Reel
製品変更通知 PDF 5.71 MB
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
製品変更通知 PDF 5.61 MB
PDN#: CQ-19-04 Product Discontinuance Notice 製品中止通知 PDF 1010 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 製品変更通知 PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 製品変更通知 PDF 583 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products 製品変更通知 PDF 361 KB
その他資料
Timing Solutions Products Overview 概要 PDF 4.11 MB
IDT Clock Generation Overview (Japanese) English 概要 PDF 2.19 MB
IDT Clock Distribution Overview (Japanese) English 概要 PDF 7.79 MB