The 348 field programmable clock synthesizer generates up to 9 high-quality, high-frequency clock outputs including multiple reference clocks from a low frequency crystal or clock input. The 348 has 4 independent on-chip PLLs and is designed to replace crystals and crystal oscillators in most electronic systems. Using IDT's VersaClockTM software to configure PLLs and outputs, the 348 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include eight selectable configuration registers, up to two sets of four low-skew outputs. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving board space and cost. The 348 is also available in factory programmed custom versions for high-volume applications.

特長

  • Packaged as 20-pin SSOP (QSOP) (Pb-free)
  • Eight addressable registers
  • Replaces multiple crystals and oscillators
  • Output frequencies up to 200 MHz at 3.3V
  • Input crystal frequency of 5 to 27 MHz
  • Input clock frequency of 2 to 50 MHz
  • Up to nine reference outputs
  • Up to two sets of four low-skew outputs
  • Operating voltages of 3.3 V
  • Advanced, low power CMOS process
  • For one output clock, use the ICS341 (8-pin). For two output clocks, use the ICS342 (8-pin). For three output clocks, use the ICS343 (8-pin). For more than three outputs, use the ICS345 or ICS348.

製品選択

発注型名 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type パッケージ 購入/サンプル
348RIPLF Obsolete QSOP 20 I はい Tube Package Info
Availability
348RIPLFT Obsolete QSOP 20 I はい Reel Package Info
Availability
348RPLF Obsolete QSOP 20 C はい Tube Package Info
Availability
348RPLFT Obsolete QSOP 20 C はい Reel Package Info
Availability

ドキュメント&ダウンロード

タイトル 他の言語 分類 形式 サイズ 日付
データシート
348 Datasheet Datasheet PDF 176 KB
348-22 Datasheet Datasheet PDF 203 KB
ユーザーガイド
VersaClock II User Guide Manual Manual - User Reference PDF 612 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 128 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 133 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : A1808-01 Transfer Assembly Location from Amkor Philippines for select pacakges Product Change Notice PDF 39 KB
PDN# : CQ-17-04(R1) Product Discontinuance Notice Product Discontinuation Notice PDF 606 KB
PDN# : CQ-17-04 Product Discontinuance Notice Product Discontinuation Notice PDF 599 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Downloads
VersaClock II Desktop Software Setup Software ZIP 6.24 MB
348 3.3 V IBIS Model Model - IBIS ZIP 3 KB
348 3.3 V IBIS Model Model - IBIS ZIP 3 KB
その他資料
VersaClock Family of Programmable Clocks Overview (Japanese) English Overview PDF 1.31 MB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications (Japanese) English Product Brief PDF 6.27 MB
IDT Products for Radio Applications (Japanese) English Product Brief PDF 6.27 MB
VersaClock Family of Programmable Clocks Overview (Japanese) English Overview PDF 1.31 MB
IDT Clock Generation Overview (Japanese) English Overview PDF 2.19 MB
IDT Clock Distribution Overview (Japanese) English Overview PDF 7.79 MB
IDT Clock Generation Overview (Japanese) English Overview PDF 2.19 MB
IDT Clock Distribution Overview (Japanese) English Overview PDF 7.79 MB