The 5P49V6967 is a member of IDT's VersaClock® 6E programmable clock generator family. The 5P49V6967 is intended for high-performance consumer, networking, industrial, computing, and data-communications applications. The reference clock can come from one of the two redundant clock inputs. A glitchless manual switchover function allows one of the redundant clocks to be selected during normal operation.
 
Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface.
 

Features

  • < 100mW core power (at 3.3V)
  • < 0.5ps RMS phase jitter (typical)
  • PCIe Gen 1/2/3/4/5 spread spectrum off
  • PCIe Gen 1/2/3/4 spread spectrum on
  • 1/10GbE, USB 3.0
  • 3 universal outputs pairs: LVPECL, LVDS, HCSL, or 6 LVCMOS outputs
  • 3 independent frequencies with 0.001MHz–350MHz output range
  • 4 additional copies of LP-HCSL outputs (1 independent frequency)
  • Reference output
  • 1.8V / 2.5V / 3.3V core and output voltages
  • 2 programmable I²C addresses allowing multiple devices to be used in same system
  • Up to 4 different configuration sets in OTP non-volatile memory
  • Supported by IDT Timing Commander™  software tool
  • Quick sampling and customization process supported by online-form submission
  • 5 x 5 mm 40-VFQFPN package
  • -40°C to +85°C operating temperature range

Product Options

This device is factory-configurable. Try the Custom Part Configuration Utility.
注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
5P49V6967A000NDGI Active NDG40P3 VFQFPN 40 I Yes Tray
Availability
5P49V6967A000NDGI8 Active NDG40P3 VFQFPN 40 I Yes Reel
Availability

Product Comparison

5P49V6967 5P49V6965 5P49V6968 5P49V6975
Inputs (#) 2 2 2 1
Outputs (#) 9 5 11 5
Output Type , HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL , HCSL, LVCMOS, LVDS, LVPECL , HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL , HCSL, LVCMOS, LVDS, LVPECL
Phase Jitter Typ RMS (ps) 0.500 0.500 0.500 0.500

Documentation & Downloads

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
5P49V6967 Datasheet Datasheet PDF 940 KB
ユーザーガイド
VersaClock 6E Family Register Descriptions and Programming Guide Manual - User Reference PDF 872 KB
Timing Commander Installation Guide Guide PDF 497 KB
アプリケーションノート、ホワイトペーパー
AN-1014 Microstrip vs Stripline: Crosstalk and RMS Phase Jitter Application Note PDF 486 KB
AN-975 Cascading PLLs Application Note PDF 255 KB
AN-970 Glitchless Frequency Adjustment using Fractional Output Divider Application Note PDF 717 KB
AN-960 Layout and EMI Recommendations for Automotive Applications (short form) Application Note PDF 342 KB
AN-954 Layout and EMI Recommendations for Automotive Applications Application Note PDF 406 KB
AN-909 PCB Layout Considerations for Designing IDT VersaClock 3S, 5 and 6 Clock Products Application Note PDF 901 KB
AN-918 Programmable Clocks vs Crystal Oscillators Application Note PDF 307 KB
AN-905 Using VersaClock® 6 as Reference Clock for Xilinx® Series 7 FPGAs Application Note PDF 188 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 137 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
Downloads
Timing Commander Installer (v1.15.0.27471) Software ZIP 19.57 MB
VersaClock 6E Timing Commander Personality File v1.3.0 Software ZIP 13.95 MB
5P49V6967 IBIS Model Model - IBIS ZIP 408 KB
その他資料
PCI Express Timing Solutions Overview Overview PDF 275 KB
VersaClock Family Overview (日本語) English Overview PDF 785 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Wired Broadband Applications Application Briefs PDF 686 KB
IDT Products for Radio Applications (日本語) English Product Brief PDF 2.34 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clocks for Xilinx Ultrascale FPGAs Technical Brief PDF 256 KB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB
IDT Clocks for Altera's Stratix V and Arria V/X FPGAs Technical Brief PDF 238 KB

Boards & Kits

Part Number Title Type Company
5P49V6967-EVK Evaluation Board for 5P49V6967 VersaClock® 6E