NOTICE - The following device(s) are recommended alternatives:

The 8343I-01 is a low skew, 1-to-16 LVCMOS/ LVTTL Fanout Buffer. The 8343I-01 single ended clock input accepts LVCMOS or LVTTL input levels. The 8343I-01 operates at 3.3V, 2.5V and mixed 3.3V input and 2.5V supply modes over the industrial temperature range. Guaranteed output and part-to-part skew characteristics make the 8343I-01 ideal for those clock distribution applications demanding well defined performance and repeatability.

特性

  • Sixteen LVCMOS/LVTTL outputs, 7Ω typical output impedance
  • One LVCMOS/LVTTL clock input
  • CLK can accept the following input levels: LVCMOS, LVTTL
  • Maximum output frequency: 200MHz
  • Dual output enable inputs facilitates 1-to-16 or 1-to-8 input
  • All inputs are 5V tolerant
  • Output skew: 250ps (typical)
  • Part-to-part skew: 700ps (typical)
  • Output supply modes: Core/Output 3.3V/3.3V 2.5V/2.5V 3.3V/2.5V
  • -40°C to 85°C ambient operating temperature

产品选择

下单器件 ID Part Status Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete 32 I 是的 Tray
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 363 KB
PCN# : TB1303-01 Change of Carrier Tape for TQFP-32, TQFP-48 产品变更通告 PDF 472 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 209 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB