NOTICE - The following device(s) are recommended alternatives:

The 8624I is a high performance, 1-to-5 Differential-to-HSTL zero delay buffer. The 8624I has two selectable clock input pairs. The CLK0, nCLK0 and CLK1, nCLK1 pair can accept most standard differential input levels. The VCO operates at a frequency range of 250MHz to 630MHz. Utilizing one of the outputs as feedback to the PLL, output frequencies up to 630MHz can be regenerated with zero delay with respect to the input. Dual reference clock inputs support reduntant clock or multiple reference applications..

特性

  • Fully integrated PLL
  • Five differential HSTL compatible outputs
  • Selectable differential CLKx, nCLKx input pairs
  • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, HSTL, SSTL, HCSL
  • Output frequency range: 31.25MHz to 630MHz
  • Input frequency range: 31.25MHz to 630MHz
  • VCO range: 250MHz to 630MHz
  • External feedback for "zero delay" clock regeneration
  • Cycle-to-cycle jitter: 35ps (maximum)
  • Output skew: 50ps (maximum)
  • Static phase offset: 30ps ±125ps
  • 3.3V core, 1.8V output operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free RoHS-compliant packages
  • For replacement device use 8725BY-01LF

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TQFP 32 I 是的 Tray
Availability
Obsolete TQFP 32 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN# : CQ-14-07 Quarter PDN for Market Declined 产品停产通告 PDF 541 KB
PCN# : A1401-02 Alternate Copper Wire Assembly Site 产品变更通告 PDF 36 KB
PCN# : TB1303-01 Change of Carrier Tape for TQFP-32, TQFP-48 产品变更通告 PDF 472 KB
Downloads
8624I IBIS 模型 - IBIS ZIP 41 KB
其他
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB