The ADC1413D080HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates of 80 Msps. Pipelined architecture and output error correction ensure the ADC1413D080HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD204A standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. A set of IC configurations is also available via the binary level control pins taken, which are used at power-up.

Features

  • 2 configurable serial outputs
  • 3.3 V, 1.8 V single supplies
  • Compliant with JESD204A serial transmission standard
  • Dual channel 14-bit pipelined ADC core
  • Duty cycle stabilizer
  • Flexible input voltage range: 1 V (p-p) to 2 V (p-p) with 6 dB programmable fine
  • gain
  • High IF capability
  • Input bandwidth, 600 MHz
  • Offset binary, 2's complement, gray code
  • Power dissipation, 995 mW at 80 Msps
  • Power-down and Sleep modes
  • Sample rate up to 80 Msps
  • SFDR, 90 dBc
  • SNR, 73 dB
  • SPI interface

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
ADC1413D080HN-C1 Obsolete NLG56 VFQFPN 56 I Yes Tray
Availability
ADC1413D080HN-C18 Obsolete NLG56 VFQFPN 56 I Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
ADC1413D SER Datasheet Datasheet PDF 660 KB
PCN / PDN
PDN# : DC-14-07 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 528 KB

Evaluation Boards

Part Number Title 升序排列
ADC1413D080W2 ADC1413D080W2 demo board, Lattice ECP3 on board
ADC1413D080W1 ADC1413D080W1 Demo board With FPGA
ADC1413D080WO ADC1413D080W0 demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through
specific connectors