The 9DBL0643 Zero-Delay/Fanout buffer is a low-power high-performance member of Reneas' Full-Featured PCIe family. The buffer supports PCIe Gen1–5 and provides a Loss of Signal (LOS) indicator. The device is an easy upgrade from the 9DBL0641.
 
For information regarding evaluation boards and material, please contact your local sales representative.
 

特性

  • Loss of Signal (LOS) output; supports fault tolerant systems
  • Supports PCIe Gen1–5 CC and IR in fanout mode
  • Supports PCIe Gen1–5 CC in High Bandwidth ZDB mode
  • Direct connection to 100Ω transmission lines; saves 24 resistors compared to standard PCIe devices
  • Spread spectrum tolerant; allows reduction of EMI
  • Pin/SMBus selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
  • Easy AC-coupling to other logic families, see application note AN-891.
  • Space saving 5 × 5 mm 40-VFQFPN; minimal board space

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Output Impedance Carrier Type 封装 Buy Sample
9DBL0643ANDGI Active VFQFPN 40 I 100 Tray Package Info
Availability
9DBL0643ANDGI8 Active VFQFPN 40 I 100 Reel Package Info
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
9DBL02x3-04x3-06x3-08x3 Family Datasheet Datasheet PDF 477 KB
使用指南与说明
Timing Products for NXP (Freescale) i.MX (Chinese) English Guide PDF 512 KB
Timing Products for NXP (Freescale) i.MX (Chinese) English Guide PDF 512 KB
应用指南 &白皮书
AN-975 Cascading PLLs Application Note PDF 255 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs Application Note PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 235 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
Downloads
9DBL06P1 IBIS Model Model - IBIS ZIP 118 KB
其他
PCI Express Timing Solutions Overview Overview PDF 275 KB
9DBL06xx Reference Schematic Schematic PDF 118 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB