The 557-01 is a clock chip designed for use in PCI Express® Cards as a clock source. It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package. Using IDT's patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces HCSL (Host Clock Signal Level) differential outputs at 100 MHz clock frequency. LVDS signal levels can also be supported via an alternative termination scheme.

Features

  • Supports PCI Express®TM HCSL Outputs 0.7 V current mode differential pair
  • Supports LVDS Output Levels
  • Packaged in 8-pin SOIC
  • RoHS 5 (green) or RoHS 6 (green and lead free) compliant packaging
  • Operating voltage of 3.3 V
  • Low power consumption
  • Input frequency of 25 MHz
  • Short term jitter 100 ps (peak-to-peak)
  • Output Enable via pin selection
  • Industrial temperature range available
  • For PCIe Gen2 applications, see the 5V41064
  • For PCIe Gen3 applications, see the 5V41234

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
557M-01LF Active DCG8 SOIC 8 C Yes Tube
Availability
557M-01LFT Active DCG8 SOIC 8 C Yes Reel
Availability

Documentation & Downloads

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
557-01 Datasheet Datasheet PDF 203 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 137 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PDN# : CQ-18-03 Product Discontinuance Notice Product Discontinuation Notice PDF 218 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil Product Change Notice PDF 223 KB
Downloads
557-01 IBIS Model Model - IBIS ZIP 4 KB
其它
PCI Express Timing Solutions Overview Overview PDF 275 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Boards & Kits