NOTICE - The following device(s) are recommended alternatives:

The 841202-245 is a two output clock synthesizer optimized to generate low jitter with or without spread spectrum modulation. Spread type and amount can be configured via the SSC control pins. Using a 25MHz, 18pF parallel resonant crystal, the device will generate HCSL clocks at either 25MHz, 100MHz, 125MHz or 250MHz. The 841202-245 uses a low jitter VCO and is packaged in a 32-pin VFQFN package.

特性

  • Two differential HCSL output pairs at: 100MHz, 125MHz or 250MHz
  • HCSL outputs can be terminated to drive LVDS loads up to 175MHz
  • 25MHz crystal interface
  • Supports the following output frequencies: 25MHz, 100MHz, 125MHz or 250MHz
  • VCO range: 250MHz - 700MHz
  • Supports SSC downspread at 0.05% and -0.75%, centerspread at ±0.25% and no spread options
  • Cycle-to-cycle jitter: 15ps (typical)
  • Period jitter, RMS: 2.5ps (typical)
  • Full 3.3V operating supply mode
  • 0°C to 70°C ambient operating temperature
  • Available in lead-free (RoHS 6) packages

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete VFQFPN 32 C 是的 Tray
Availability
Obsolete VFQFPN 32 C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
ICS841202-245 Datasheet 数据手册 PDF 325 KB
PCN / PDN
PDN# : CQ-16-01 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 552 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 544 KB
其他
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB