The IDT5T915 2.5V differential (DDR) clock buffer is a user-selectable single-ended or differential input to five differential outputs built on advanced metal CMOS technology. The differential clock buffer fanout from a single or differential input to five differential or single-ended outputs reduces loading on the preceding driver and provides an efficient clock distribution network. The IDT5T915 can act as a translator from a differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended 1.8V/2.5V LVTTL input to HSTL, eHSTL, 1.8V/2.5V LVTTL outputs. Selectable interface is controlled by 3-level input signals that may be hard-wired to appropriate high-mid-low levels. The IDT5T915 true or complementary outputs can be asynchronously enabled/disabled. Multiple power and grounds reduce noise.

特性

  • Guaranteed Low Skew < 60ps (max)
  • Very low duty cycle distortion < 300ps (max)
  • High speed propagation delay < 2ns (max)
  • Up to 250MHz operation
  • Very low CMOS power levels
  • Hot insertable and over-voltage tolerant inputs
  • 3-level inputs for selectable interface
  • Selectable HSTL, eHSTL, 1.8V / 2.5V LVTTL, or LVEPECL input interface
  • Selectable differential or single-ended inputs and five differential outputs
  • 2.5V VDD
  • Available in TSSOP package

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TSSOP 48 I 是的 Tube
Availability
Obsolete TSSOP 48 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
5T915 Datasheet 数据手册 PDF 420 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN# : CQ-15-05 Market Declined Quarterly PDN 产品停产通告 PDF 623 KB
PCN#: A-0410-02, Change IDT marking logo with new IDT gridless w 产品变更通告 PDF 24 KB
PCN# : A0803-02 Add ATP as alternate assembly for TSSOP-48 and TSSOP-56 产品变更通告 PDF 129 KB
PCN#: TB-0510-05 New Shipping Tube for TSSOP/TVSOP/TSSOP Exposed 产品变更通告 PDF 201 KB
PCN# A-0508-02: OSET Alternate Assembly Location for Green 产品变更通告 PDF 18 KB
PCN# A-0504-02R2: Assembly Transfer IDT-Manila to OSE-Ph 产品变更通告 PDF 38 KB
PCN#A-0504-02R1: Assembly Transfer IDT-Manila to OSE-Ph 产品变更通告 PDF 16 KB
PCN#: A-0504-02, Transfer assembly facility IDT-Manila to OSE-Ph 产品变更通告 PDF 47 KB
PCN#: TB-0504-01, Transfer Test & Backend from IDT-Manila to IDT 产品变更通告 PDF 35 KB
PCN#: A-0412-04 - To comply with Pb-free labels - Green Products 产品变更通告 PDF 80 KB
PCN#: A-0310-01, Green Products 产品变更通告 PDF 26 KB
PCN#: G-0303-04, new m/c G700 & 8290 d/a material 产品变更通告 PDF 130 KB
PCN# G-0110-06 REV.1 Mold Compound 产品变更通告 PDF 48 KB
PCN# G-0110-06 Mold Compound 产品变更通告 PDF 47 KB
PCN# G-0110-06 Mold Compound 产品变更通告 PDF 48 KB
Downloads
5T915 IBIS Model 模型 - IBIS ZIP 17 KB
其他
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB