The 621S is a low cost, high-speed single input to four output LVCMOS clock buffer. The 621S has best in class Additive Phase Jitter of sub 50 fsec.

Features

  • Low additive phase jitter RMS: 50 fs
  • Extremely low skew outputs (50 ps)
  • Low cost clock buffer
  • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free
  • Input / Output clock frequency up to 200 MHz
  • Non-inverting output clock
  • Ideal for networking clocks
  • Operating Voltages: 1.8 V to 3.3 V
  • Output Enable mode tri-states outputs
  • Advanced, low power CMOS process
  • Extended temperature range (-40°C to +105°C)

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
621SCMGI Active CMG8 COL 8 I Yes Cut Tape
Availability
621SCMGI8 Active CMG8 COL 8 I Yes Reel
Availability
621SDCGI Active DCG8 SOIC 8 I Yes Tube
Availability
621SDCGI8 Active DCG8 SOIC 8 I Yes Reel
Availability

Documentation & Downloads

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
621S Datasheet Datasheet PDF 304 KB
应用指南 &白皮书
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
PCN / PDN
PCN# : A1905-02 Adding Carsem, Malaysia as Alternate Assembly Location & Change Material Sets Product Change Notice PDF 268 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
Downloads
621S IBIS Model Model - IBIS ZIP 22 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Boards & Kits