NOTICE - The following device(s) are recommended alternatives:

The 845254I is a 3.3V/2.5V CML clock generator designed for Ethernet applications. The device synthesizes either a 50MHz, 62.5MHz, 100MHz, 125MHz, 156.25MHz, 250MHz or 312.5MHz clock signal with excellent phase jitter performance. The clock signal is distributed to four low-skew differential CML outputs. The device is suitable for driving the reference clocks of Ethernet PHYs. The device supports 3.3V and 2.5V voltage supply and is packaged in a small, lead-free (RoHS 6) 32-lead VFQFN package. The extended temperature range supports telecommunication, wireless infrastructure and networking end equipment requirements.

Features

  • Clock generation of: 50MHz, 62.5MHz, 100MHz, 125MHz, 156.25MHz, 250MHz and 312.5MHz
  • Four differential CML clock output pairs
  • 25MHz reference clock (selectable internal crystal oscillator and external LVCMOS clock)
  • RMS phase jitter @ 125MHz, using a 25MHz crystal (1.875MHz – 20MHz): 0.405ps (typical)

    Offset                      Noise Power
      100Hz.................... -104.6 dBc/Hz
        1kHz.................... -118.4 dBc/Hz
      10kHz................... -124.1 dBc/Hz
    100kHz................... -125.3 dBc/Hz
     
  • LVCMOS interface levels for the control inputs
  • Full 3.3V and 2.5V supply voltage
  • Available in lead-free (RoHS 6) 32 VFQFN package
  • -40°C to 85°C ambient operating temperature

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
845254AKILF Obsolete NLG32P1 VFQFPN 32 I Yes Tray
Availability
845254AKILFT Obsolete NLG32P1 VFQFPN 32 I Yes Reel
Availability

Documentation & Downloads

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
845254 Datasheet Datasheet PDF 449 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 128 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 133 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
PCN / PDN
PDN# : CQ-15-04 Quarterly Market Declined PDN Product Discontinuation Notice PDF 545 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Boards & Kits