The 8T49N240 has one fractional-feedback PLL that can be used as a frequency translator with jitter attenuation or a frequency synthesizer. It is equipped with three integer and one fractional output dividers, allowing the generation of up to two different output frequencies, ranging from 8kHz to 1GHz. Output frequencies can be completely independent of the input frequencies, two of these frequencies can be completely independent of each other and the other two will be integer-related to one of the other two frequencies. The four outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels.
The 8T49N240 is ideal for use in a wide range of equipment, including 10G/40G/100G SONET/SDH and Ethernet network line cards, wireless base station baseband units, broadcast video, carrier Ethernet switches, OTN, or in test and measurement applications. For example, the 8T49N240 can be used in GbE/10GbE/100GbE Synchronous Ethernet line card applications in order to preserve the G.8262 compliance from the Synchronous Equipment Timing Source (SETS) on the timing card. The 8T49N240 provides a 200fs (typical, 12kHz to 20MHz) RMS jitter performance that provides users with additional margin in their designs.
IDT’s third generation Universal Frequency Translator family also includes the 8T49N241 (2-in / 1-PLL / 4-out), 8T49N242 (2-in / 1-PLL / 4-out), the 8T49N285 (2-in / 1-PLL / 8-out), the 8T49N286 (4-in / 2-PLL / 8-out) and the 8T49N287 (2-in / 2-PLL / 8-out). These devices are complemented by the 82P33714 and 82P33731 synchronous equipment timing source (SETS) for Synchronous Ethernet (SyncE) and 10G-40G SyncE, respectively.
To see other devices in this product family, visit the Universal Frequency Translators page.
- Compliant with the requirements outlined in Telcordia GR-253-CORE (SONET) & ITU-T G.813/G.8262 (SDH/SONET & SyncE) when paired with a Synchronous Equipment Timing Source (SETS ) device
- Generates up to 4 LVPECL / LVDS / HCSL or 16 LVCMOS output clocks ranging from 8kHz up to 1.0GHz (diff), 8kHz to 250MHz (LVCMOS), that meet jitter limits for 10G up to 25G Ethernet applications
- 0.2ps RMS (including spurs), 12kHz to 20MHz
- Accepts up to two LVPECL, LVDS, LVHSTL, HCSL or LVCMOS input clocks ranging from 8kHz up to 875MHz
- Auto and manual input clock selection with hitless switching
- Clock input monitoring, including support for gapped clocks
- Phase-Slope Limiting and Fully Hitless Switching options to control output phase transients
- Operates from a 25MHz to 50MHz crystal
- Register programmable through I²C or via external I²C EEPROM
- 8T49N240-991 “Boot from EEPROM”
- 8T49N240-994 “powers up disabled”
- Supported by IDT Timing Commander Software™