2-output 3.3 V PCIe Clock Generator
The 9FGL02 devices are 3.3V members of IDT’s 3.3V Full-Featured PCIe family. The devices have 2 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL02 supports PCIe Gen1-4 Common Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. The 9FGL02P1 can be programmed with a user-defined power up default SMBus configuration.
- PCIe Gen1-2-3-4 CC-compliant
- PCIe Gen2-3 SRIS-compliant
- Supports PCIe SRnS clocking
- Direct connection to 100Ω (xx41) or 85Ω (xx51) transmission lines; saves 8 resistors compared to standard PCIe devices
- Pin/SMBus selectable 0%, -0.25% or -0.5% spread on DIF outputs; minimize EMI and phase jitter for each application
- 1 - 3.3V LVCMOS REF output w/Wake-On-LAN (WOL) support
- Easy AC-coupling to other logic families, see IDT application note AN-891.
- Space saving 24-pin 4x4mm VFQFPN; minimal board space
|App Jitter Compliance||Input Freq (MHz)||Inputs (#)||Input Type||Xtal Freq (MHz)||Output Freq Range (MHz)||Outputs (#)||Output Type||Output Voltage (V)||Power Consumption Typ (mW)||Output Skew (ps)||Supply Voltage (V)||Spread Spectrum|
|PCIe Gen4, PCIe Gen1, PCIe Gen3, PCIe Gen2||25.000000||1||LVCMOS, Crystal||25.000000||25.000000, 100.000000||3||LVCMOS, LP-HCSL||0.8, 3.3||112||50||3.30||Yes|