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8-output 3.3 V PCIe Gen1-2-3 Clock Generator with Zo=100 ohms

The 9FGL839 is an 8 output differential synthesizer for PCI Express Gen1, Gen2, and Gen3 applications. It has integrated terminations providing direction connection to 100 ohm transmission lines and saving 32 resistors compared to standard HCSL outputs. The 9FGL839 supports Common, Data and Separate Reference no-Spread (SRnS) PCIe clock architectures.


  • Integrated terminations; save 32 resistors compared to standard HCSL outputs
  • LP-HCSL outputs; support separate VDDIO rail and 130mW typical power consumption
  • 8 OE# pins; Hardware control of each output
  • 25 MHz crystal input; exact synthesis
  • 100 MHz operation; supports PCIe and SATA applications
  • VDDIO; allows outputs to run from lower voltage rail to save power
  • OE# pins have 1.5V high input threshold; direct interface to 1.8-3.3 V systems
  • <130 mW power consumption (typical)
  • Cycle-to-cycle jitter <50 ps
  • Output-to-output skew <100 ps
  • PCIe Gen2 phase jitter <3.0 ps RMS
  • PCIe Gen3 phase jitter <1.0 ps RMS
  • PCIe Gen3 SRnS clock phase jitter <0.7 ps RMS

Product Specification

Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
LP-HCSL100.00000025.0000001LVCMOS, Crystal13.30.8

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
9FGL839AKILFActiveNDG48P1VFQFPN48IYesTrayCheck Availability
9FGL839AKILFTActiveNDG48P1VFQFPN48IYesReelCheck Availability
9FGL839AKLFActiveNDG48P1VFQFPN48CYesTrayCheck Availability
9FGL839AKLFTActiveNDG48P1VFQFPN48CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
9FGL839 Datasheet Datasheet PDF 158 KB Oct 28, 2015
Apps Notes & White Papers
AN-918 Programmable Clocks vs Crystal Oscillators Application Note PDF 221 KB Mar 10, 2016
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB Dec 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB Apr 8, 2015
show all (15)
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB Mar 12, 2014
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB Jan 15, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 22, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 21, 2015
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB Dec 21, 2012
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

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