Skip to main content
9ZML1232 Pinout
9ZML1232 Block Diagram

9ZML1232

2:12 DB1200ZL Derivative Low Power HCSL Clock Mux

The 9ZML1232 is a 2-input/12-output differential mux for use in servers. It meets the demanding DB1200ZL performance specifications and utilizes Low-Power HCSL-compatible outputs to reduce power consumption and termination components. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications.

Features

  • Fixed feedback path; 0ps input-to-output delay
  • 9 Selectable SMBus addresses; multiple devices can share same SMBus segment
  • Separate VDDIO for outputs; allows maximum power savings
  • PLL or bypass mode; PLL can dejitter incoming clock
  • Hardware or Software-selectable PLL BW; minimizes jitter peaking in downstream PLL’s
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • SMBus Interface; unused outputs can be disabled
  • Differential outputs are Low/Low in power down; maximum power savings

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
12LP-HCSL33.000000 - 150.00000033.000000 - 150.0000002HCSL13.30.7

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
9ZML1232BKLFActiveNLG72P1VFQFPN72CYesTrayCheck Availability
9ZML1232BKLFTActiveNLG72P1VFQFPN72CYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
no-lock
9ZML1232 Datasheet Datasheet PDF 217 KB Nov 20, 2015
Apps Notes & White Papers
no-lock
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
no-lock
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB Dec 10, 2015
no-lock
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB Apr 8, 2015
show all (10)
no-lock
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
no-lock
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
no-lock
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
no-lock
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
no-lock
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
no-lock
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
no-lock
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB Jan 15, 2014
PCNs & PDNs
no-lock
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 28, 2016
no-lock
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 13, 2015
no-lock
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 22, 2015
show all (7)
no-lock
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 21, 2015
no-lock
PCN# : A1403-03 Gold wire to Copper wire Product Change Notice PDF 42 KB Oct 15, 2014
no-lock
PCN# : A1311-03R1 Alternate Assembly Locations Product Change Notice PDF 43 KB Feb 16, 2014
no-lock
PCN# : A1311-03 Alternate Assembly Locations Product Change Notice PDF 140 KB Dec 3, 2013
Other
no-lock
IDT PCI Express Solutions Overview 简体中文, 日本語 Overview PDF 945 KB Aug 4, 2016
no-lock
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
no-lock
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016
show all (4)
no-lock
9ZML1232 Reference Schematic Schematic PDF 36 KB Jan 23, 2015

Software & Tools

Title Type Format File Size Datesort icon
no-lock
9ZML1232 IBIS Model Model - IBIS ZIP 35 KB Jan 26, 2015