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553S Block Diagram
553S Pinout - DFN
553S Pinout - SOIC

553S

Low Skew 1 to 4 Clock Buffer

The 553S is a low skew, single input to four output, LVCMOS clock buffer. The 553S has best in class additive phase Jitter of sub 50 fsec.

Features

  • Low additive phase jitter RMS: 50 fs
  • Extremely low skew outputs (50 ps)
  • Low cost clock buffer
  • Packaged in 8-pin SOIC and small 8-pin DFN package, Pb-free
  • Input / Output clock frequency up to 200 MHz
  • Ideal for networking clocks
  • Operating Voltages: 1.8 V to 3.3 V
  • Output Enable mode tri-states outputs
  • Advanced, low power CMOS process
  • Extended temperature range (-40°C to +105°C)

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Skew (ps)
4LVCMOS0.000000 - 200.0000000.000000 - 200.0000001LVCMOS11.8, 2.5, 3.365

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
553SCMGIActiveCMG8COL8IYesCUTRCheck Availability
553SCMGI8ActiveCMG8COL8IYesReelCheck Availability
553SDCGIActiveDCG8SOIC8IYesTubeCheck Availability
553SDCGI8ActiveDCG8SOIC8IYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
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553S Datasheet Datasheet PDF 217 KB Mar 19, 2015
Apps Notes & White Papers
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AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
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AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
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AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
show all (4)
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AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
PCNs & PDNs
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PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 14, 2016
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PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 15, 2016
Other
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IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
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IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

News & Additional Resources

Related Videos

  • 2015-03-24 Low-jitter LVCMOS Fanout Clock Buffers by IDT