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5P83905 Block Diagram
5P83905 Pinout

5P83905

1.8 V to 3.3 V 1:6 Crystal Input to LVCMOS Output High-Performance Clock Fanout Buffer with OE

The 5P83905 is a high-performance, 1-to-6 crystal input to LVCMOS fanout buffer with output enable pins. This device accepts a fundamental mode crystal from 10 MHz to 40 MHz and outputs LVCMOS clocks with best-in-class phase noise performance.

The 5P83905 features a synchronous glitch-free Output Enable function to eliminate any intermediate incorrect output clock cycles when enabling or disabling outputs. It comes in standard TSSOP packages or small QFN packages and can operate from 1.8 V to 3.3 V supplies.

Features

  • Six copies of LVCMOS output clocks with best-in-class phase noise performance
  • Phase Noise:
    Offset Noise Power (3.3 V)
    •      100 Hz: -131 dBc/Hz
    •      1 KHz: -145 dBc/Hz
    •      10 KHz: -154 dBc/Hz
    •      100 KHz: -161 dBc/Hz
  • Operating power supply modes:
    •      Full 3.3 V, 2.5 V, 1.8 V
    •      Mixed 3.3 V core / 2.5 V output operating supply
    •      Mixed 3.3 V core / 1.8 V output operating supply
    •      Mixed 2.5 V core / 1.8 V output operating supply
  • Crystal Oscillator Interface
  • Synchronous Output Enable
  • Packaged in 16-pin TSSOP and QFN packages
  • Extended temperature range (-40°C to +105°C) 

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Skew (ps)
6LVCMOS0.000000 - 200.0000000.000000 - 200.0000001LVCMOS, Crystal11.8, 2.5, 3.365

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
5P83905PGGKPreviewPGG16TSSOP16KYesTubeCheck Availability
5P83905PGGK8PreviewPGG16TSSOP16KYesReelCheck Availability
5P83905CMGKPreviewCMG16COL16KYesCUTRCheck Availability
5P83905CMGK8PreviewCMG16COL16KYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
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5P8390x Datasheet Datasheet PDF 366 KB Jul 11, 2016
Apps Notes & White Papers
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AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
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AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
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AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
show all (4)
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AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
Other
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IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview Overview PDF 252 KB Aug 17, 2016
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IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
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IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

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