1.8 V to 3.3 V 1:8 Crystal Input to LVCMOS Output High-Performance Clock Fanout Buffer with OE

The 5P83908 is a high-performance, 1-to-8 crystal input to LVCMOS fanout buffer with output enable pins. This device accepts a fundamental mode crystal from 10 MHz to 40 MHz and outputs LVCMOS clocks with best-in-class phase noise performance.

The 5P83908 features a synchronous glitch-free Output Enable function to eliminate any intermediate incorrect output clock cycles when enabling or disabling outputs. It comes in standard TSSOP packages or small QFN packages and can operate from 1.8 V to 3.3 V supplies.

Features

  • Eight copies of LVCMOS output clocks with best-in-class phase noise performance
  • Phase Noise:
    Offset Noise Power (3.3 V)
    •      100 Hz: -131 dBc/Hz
    •      1 KHz: -145 dBc/Hz
    •      10 KHz: -154 dBc/Hz
    •      100 KHz: -161 dBc/Hz
  • Operating power supply modes:
    •      Full 3.3 V, 2.5 V, 1.8 V
    •      Mixed 3.3 V core / 2.5 V output operating supply
    •      Mixed 3.3 V core / 1.8 V output operating supply
    •      Mixed 2.5 V core / 1.8 V output operating supply
  • Crystal Oscillator Interface
  • Synchronous Output Enable
  • Packaged in 20-pin TSSOP and QFN packages
  • Extended temperature range (-40°C to +105°C) 

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5P83908PGGK Preview PGG20 TSSOP 20 K Yes Tube Availability
5P83908PGGK8 Preview PGG20 TSSOP 20 K Yes Reel Availability
5P83908NDGK Preview NDG20P2 VFQFPN 20 K Yes Tray Availability
5P83908NDGK8 Preview NDG20P2 VFQFPN 20 K Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
5P8390x Datasheet - Datasheet PDF 367 KB Oct 11, 2016
Application Notes & White Papers
AN-815 Understanding Jitter Units - Application Note PDF 476 KB Apr 23, 2014
AN-845 Termination - LVCMOS - Application Note PDF 62 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection - Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals - Application Note PDF 349 KB May 7, 2014
Other
The IDT Communications Products Advantage - Overview PDF 2.54 MB Feb 13, 2017
The IDT Consumer Products Advantage - Overview PDF 6.67 MB Jan 27, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
The IDT Automotive Advantage - Overview PDF 5.67 MB Jan 18, 2017
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016
IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview - Overview PDF 252 KB Aug 16, 2016