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8T74S208A-01I

2.5V Differential LVDS Clock Divider and Fanout Buffer

The 8T74S208A-01 is a high-performance differential LVDS clock divider and fanout buffer. The device is designed for the frequency division and signal fanout of high-frequency, low phase-noise clocks. The 8T74S208A-01 is characterized to operate from a 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8T74S208A-01 ideal for those clock distribution applications demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count. Each output can be individually enabled or disabled in the high-impedance state controlled by a I2C register. On power-up, all outputs are disabled.

Features

  • One differential input reference clock
  • Differential pair can accept the following differential input levels: LVDS, LVPECLCML
  • Integrated input termination resistors
  • Eight LVDS outputs
  • Selectable clock frequency division of ÷1, ÷2, ÷4 and ÷8
  • Maximum input clock frequency: 1GHz
  • LVCMOS interface levels for the control inputs
  • Individual output enabled/ disabled by I2C interface
  • Output skew: 45ps (maximum)
  • Output rise/fall times: 370ps (maximum)
  • Low additive phase jitter, RMS: 96fs (typical)
  • Full 2.5V supply voltage
  • Outputs disable at power up
  • Lead-free (RoHS 6) 32-Lead VFQFN packaging
  • -40°C to 85°C ambient operating temperature

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)Divider ValueOutput Skew (ps)Additive Phase Jitter Typ RMS (ps)
8LVDS0.000000 - 500.000000, 0.000000 - 250.000000, 0.000000 - 125.000000, 0.000000 - 1000.0000000.000000 - 1000.0000001LVDS, LVPECL, CML12.52.51, 2, 4, 8450.096

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
8T74S208A-01NLGIActiveNLG32P3VFQFPN32IYesTrayCheck Availability
8T74S208A-01NLGI8ActiveNLG32P3VFQFPN32IYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
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8T74S208A-01 Datasheet Datasheet PDF 361 KB Aug 24, 2016
Apps Notes & White Papers
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AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
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AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
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AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
show all (7)
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AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
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AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
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AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
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AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCNs & PDNs
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PCN# : N1608-01 Redesign of 8T74S208A-01 Product Change Notice PDF 36 KB Aug 16, 2016
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PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 28, 2016
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PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 13, 2015
show all (4)
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PCN# : N1508-01 Die revision change, 8T73S208-01NLGI (8) / 8T74S208-01NLGI (8) Product Change Notice PDF 761 KB Sep 20, 2015
Other
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IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
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IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016