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2402 - Block Diagram
2402 - Pinout


Multiplier And Zero Delay Buffer

The 2402 is a high-performance Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase-Locked Loop (PLL) techniques. The chip is part of IDT's ClockBlocksTM family and was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device. The 2402 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to graphics/video. By allowing off-chip feedback paths, the device can eliminate the delay through other devices.


  • 8-pin SOIC package - Pb-free, RoHS compliant
  • Absolute jitter ±100 ps
  • Propagation Delay of ±600 ps
  • Output multiplier of 2X
  • Output clock frequency up to 80 MHz
  • Can recover degraded input clock duty cycle
  • Output clock duty cycle of 45/55
  • Full CMOS clock swings with 25 mA drive capability at TTL levels
  • Advanced, low power CMOS process
  • Operating voltage of 3.3 V or 5 V

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
1LVCMOS10.000000 - 80.00000010.000000 - 80.0000001LVCMOS13.3, 53.3, 5

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
2402MLFActiveDCG8SOIC8CYesTubeCheck Availability
2402MLFTActiveDCG8SOIC8CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
2402 Datasheet Datasheet PDF 183 KB May 14, 2010
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
show all (10)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
System Applications and Design Guidelines with IDT’s Zero-Delay Buffers Application Note PDF 245 KB Sep 11, 2013
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 14, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 15, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 22, 2015
show all (7)
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 21, 2015
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB Dec 21, 2012
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil Product Change Notice PDF 223 KB Oct 6, 2006
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016