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527-01 - Block Diagram
527-01 - Pinout


Clock Slicer User Configurable Zero Delay Buffer

The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-01 aligns rising edges on ICLK and FBIN at a ratio determined by the reference and feedback dividers. For configurable clocks that do not require zero delay, use the 525.


  • Packaged as 28-pin SSOP (150 mil body)
  • Synchronizes fractional clocks rising edges
  • Pin configurable multiplication/division ratio
  • Slices frequency or period
  • SYNC pulse output indicates aligned edges
  • Input clock frequency of 600 kHz to 200 MHz
  • Output clock frequencies up to 160 MHz
  • Very low jitter
  • Duty cycle of 45/55 up to 160 MHz
  • Operating voltage of 3.3V
  • Pin selectable drive strength
  • Multiple outputs available when combined with fanout buffers
  • Industrial temperature version available
  • Pb (lead) free package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
2LVCMOS4.000000 - 160.0000000.600000 - 200.0000001LVCMOS23.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
527R-01ILFActivePCG28QSOP28IYesTubeCheck Availability
527R-01ILFTActivePCG28QSOP28IYesReelCheck Availability
527R-01LFActivePCG28QSOP28CYesTubeCheck Availability
527R-01LFTActivePCG28QSOP28CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
527-01 Datasheet Datasheet PDF 111 KB May 22, 2012
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
show all (11)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
System Applications and Design Guidelines with IDT’s Zero-Delay Buffers Application Note PDF 245 KB Sep 11, 2013
ICS527-01/-02 Demo Board Instructions Application Note PDF 89 KB Apr 11, 2007
PCN# : A1305-01 Gold Wire to Copper Wire Product Change Notice PDF 148 KB Jul 29, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016