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Low Phase Noise Zero Delay Buffer and Multiplier

The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-02, but with an increased maximum output frequency of 210 MHz. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin. The ICS670-04 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to video. By allowing off-chip feedback paths, the chip can eliminate the delay through other devices. The 15 different on-chip multipliers work in a variety of applications. For other multipliers, including functional multipliers, see the ICS527.


  • Packaged in 16-pin SOIC – Pb (lead) free
  • Clock inputs from 5 to 210 MHz (see page 2)
  • Patented PLL with low phase noise
  • Output clocks up to 210 MHz at 3.3 V
  • 15 selectable on-chip multipliers
  • Power down mode available
  • Low phase noise: -111 dBc/Hz at 10 kHz
  • Output enable function tri-states outputs
  • Low jitter 15 ps one sigma
  • Advanced, low power, sub-micron CMOS process
  • Operating voltage of 3.3 V or 5 V
  • Industrial temperature grade

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Inputs (#)Input TypeOutput Voltage (V)Output Skew (ps)
2LVCMOS24.000000 - 210.0000001LVCMOS3.3, 5100

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
670M-04ILFActiveDCG16SOIC16IYesTubeCheck Availability
670M-04ILFTActiveDCG16SOIC16IYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
ics67004 Datasheet PDF 197 KB May 17, 2010
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (9)
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
System Applications and Design Guidelines with IDT’s Zero-Delay Buffers Application Note PDF 245 KB Sep 11, 2013
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 14, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 15, 2016
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB Oct 11, 2013
show all (5)
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB Dec 21, 2012
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil Product Change Notice PDF 223 KB Oct 6, 2006
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

Software & Tools

Title Type Format File Size Datesort icon
670-01 3.3V IBIS Model Model - IBIS ZIP 3 KB Mar 10, 2006
670-01 5.0V IBIS Model Model - IBIS ZIP 3 KB Mar 10, 2006