Skip to main content
87974I - Block Diagram
87974I - Pinout


Low Skew, 1-to-15 LVCMOS/LVTTL Clock Generator

The 87974I is a low skew, low jitter 1-to-15 LVCMOS/ LVTTL Clock Generator/Zero Delay Buffer. The device has a fully integrated PLL and three banks whose divider ratios can be independently controlled, providing output frequency relationships of 1:1, 2:1, 3:1, 3:2, 3:2:1. In addition, the external feedback connection provides for a wide selection of output-to-input frequency ratios. The CLK0 and CLK1 pins allow for redundant clocking on the input and dynamically switching the PLL between two clock sources. Guaranteed low jitter and output skew characteristics make the 87974I ideal for those applications demanding well defined performance and repeatability.


  • Fully integrated PLL
  • Fifteen single ended 3.3V LVCMOS/LVTTL outputs
  • Two LVCMOS/LVTTL clock inputs for redundant clock applications
  • CLK0 and CLK1 accepts the following input levels: LVCMOS/LVTTL
  • Output frequency range: 8.33MHz to 125MHz
  • VCO range: 200MHz to 500MHz
  • External feedback for “zero delay” clock regeneration
  • Cycle-to-cycle jitter: ±100ps (typical)
  • Output skew: 350ps (maximum)
  • 3.3V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free RoHS-compliant package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
14LVCMOS8.330000 - 125.0000002LVCMOS33.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
87974CYILFActivePPG52TQFP52IYesTrayCheck Availability
87974CYILFTActivePPG52TQFP52IYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
87974I Datasheet Datasheet PDF 239 KB Jan 26, 2016
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
show all (9)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCN# : A1401-02 Alternate Copper Wire Assembly Site Product Change Notice PDF 36 KB Feb 16, 2014
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 363 KB Jun 14, 2013
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 209 KB Feb 28, 2013
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

Software & Tools

Title Type Format File Size Datesort icon
87974I IBIS Model Model - IBIS ZIP 18 KB Nov 5, 2009