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MK2308-1H - Block Diagram
MK2308-1H - Pinout


3.3V Zero Delay, Low Skew Buffer

The MK2308-1H is a low phase noise, high-speed PLL based, 8-output, low skew zero delay buffer. Based on IDT's proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. IDT manufactures a large variety of clock generators and buffers.


  • Clock outputs from 10 to 133 MHz
  • Zero input-output delay
  • Eight low skew (<200 ps) outputs
  • Device-to-device skew <700 ps
  • Full CMOS outputs with 25 mA output drive capability at TTL levels
  • 5 V tolerant FBIN and CLKIN pins
  • Tri-state mode for board-level testing
  • Advanced, low-power, sub-micron CMOS process
  • Operating voltage of 3.3 V
  • Industrial temperature range available
  • Packaged in 16-pin SOIC and TSSOP packages
  • Pb (lead) free package
  • Industrial and commercial temp operation

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
8LVCMOS10.000000 - 133.00000010.000000 - 133.0000001LVCMOS23.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
MK2308G-1HILFActivePGG16TSSOP16IYesTubeCheck Availability
MK2308G-1HILFTRActivePGG16TSSOP16IYesReelCheck Availability
MK2308G-1HLFActivePGG16TSSOP16CYesTubeCheck Availability
MK2308G-1HLFTRActivePGG16TSSOP16CYesReelCheck Availability
MK2308S-1HLFLast Time BuyDCG16SOIC16CYesTubeCheck Availability
MK2308S-1HLFTRLast Time BuyDCG16SOIC16CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
MK2308-1H Datasheet Datasheet PDF 205 KB May 17, 2010
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
show all (9)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PDN# : CQ-16-01 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 552 KB May 4, 2016
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 14, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 15, 2016
show all (7)
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 28, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 13, 2015
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16 Product Change Notice PDF 663 KB Apr 8, 2014
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016