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181-01 - Block Diagram
181-01 - Pinout


Low EMI Clock Generator

The 181-01 generates a low EMI output clock from a clock or crystal input. The device uses IDT’s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The 181-01 offers down spread selection of -1.25% and -3.75%. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. IDT offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board.


  • Pin and function compatible to Cypress W181-01
  • Packaged in 8-pin SOIC
  • Provides a spread spectrum output clock
  • Accepts a clock input and provides same frequency dithered output
  • Input frequency of 28 to 75 MHz for Clock input
  • Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics
  • Spread percentage selection for -1.25% and -3.75%
  • Operating voltage of 3.3 V and 5 V
  • Industrial temperature range available
  • Advanced, low-power CMOS process

Product Specification

Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
LVCMOS28.000000 - 75.00000028.000000 - 75.0000001LVCMOS, Crystal13.3, 53.3, 5

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
181M-01LFObsoleteDCG8SOIC8CYesTubeCheck Availability
181M-01LFTObsoleteDCG8SOIC8CYesReelCheck Availability
181MI-01LFObsoleteDCG8SOIC8IYesTubeCheck Availability
181MI-01LFTObsoleteDCG8SOIC8IYesReelCheck Availability


Technical Documentation

Title Type Format File Size Datesort icon
Datasheets & Errata
181-01 Datasheet Datasheet PDF 148 KB May 14, 2010
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
show all (12)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 7, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 7, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PDN# CQ-14-05 MARKET DECLINED PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 192 KB Sep 4, 2014
PDN# : U-13-05R2 PRODUCT DISCONTINUANCE NOTICE (REVISED) Product Discontinuation Notice PDF 161 KB Oct 29, 2013
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB Oct 11, 2013
show all (7)
PDN# : U-13-05R1 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 161 KB Jul 25, 2013
PDN# : U-13-05 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 159 KB Apr 10, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil Product Change Notice PDF 223 KB Oct 6, 2006