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664-04 - Block Diagram
664-04 - Pinout


PECL Digital Video Clock Source

The 664-04 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The 664-04 uses the latest Phase-Locked Loop (PLL) technology to provide excellent phase noise and long-term jitter performance for superior synchronization and S/N ratio. For audio sampling clocks generated from 27 MHz, use the 661. Please contact ICS if you have a requirement for an input and output frequency not included in this document. ICS can rapidly modify this product to meet special requirements.


  • Packaged in 16-pin TSSOP
  • Available in Pb (lead) free package
  • Clock or crystal input
  • Low phase noise
  • Low jitter
  • Exact (0 ppm) multiplication ratios
  • Power-down control
  • Improved phase noise over ICS660
  • Differential outputs

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
1LVPECL0.000000 - 148.5000000.000000 - 74.2500001LVCMOS, Crystal13.32.5, 3.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
664G-04LFObsoletePGG16TSSOP16CYesTubeCheck Availability


Technical Documentation

Title Type Format File Size Datesort icon
PDN# : U-12-03R4 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 72 KB Jun 20, 2013
PDN# : U-12-03R3 Product Discontinuation Notice PDF 72 KB Mar 31, 2013