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Low Skew 1-to-4 Differential to LVPECL Fanout Buffer

Alternative Products
NOTICE - The following device(s) are recommended alternatives:
Pin-to-pin compatible

The 853S314I is a low skew 1-to-4 Differential Fanout Buffer, designed with clock distribution in mind, accepting two clock sources into an input MUX. The MUX is controlled by a CLK_SEL pin. This makes the 853S314I very versatile, in that, it can operate as both a differential clock buffer as well as a signal-level translator and fanout buffer. The device is designed on a SiGe process and can operate at frequencies in excess of 2.7GHz. This ensures negligible jitter introduction to the timing budget which makes it an ideal choice for distributing high frequency, high precision clocks across back planes and boards in communication systems. Internal temperature compensation guarantees consistent performance across various platforms.


  • 4 differential ECL/LVPECL level outputs
  • 1 differential ECL/LVPECL or single-ended input (CLKA)
  • 1 differential HSTL or single-ended input (CLKB)
  • Maximum output frequency: 2.7GHz
  • Additive phase jitter, RMS: 0.138ps (typical) @ 156.25MHz,
  • Output skew: 50ps (maximum)
  • Part-to-part skew: 150ps (maximum)
  • LVPECL and HSTL mode operating voltage supply range: VCC = 2.5V±5% or 3.3V±5%, VEE = 0V
  • ECL mode operating voltage supply range: VEE = -3.3V±5% or -2.5V±5%, VCC = 0V
  • -40°C to 85°C ambient operating temperature
  • Available inlead-free RoHS (RoHS 6) package

Product Specification

Additive Phase Jitter Typ RMS (ps)Output Skew (ps)Core Voltage (V)Inputs (#)Input TypeInput Freq (MHz)Output Voltage (V)Outputs (#)Output TypeOutput Freq Range (MHz)
0.092502.5, 3.32ECL, HSTL, LVPECL0.000000 - 2700.0000002.5, 3.34ECL, LVPECL0.000000 - 2700.000000

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
853S314AFILFTObsoletePYG20SSOP20IYesReelCheck Availability
853S314AGILFObsoletePGG20TSSOP20IYesTubeCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (11)
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 6, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PDN# : N-13-03R1 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 72 KB Jun 13, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
PDN# : N-13-03 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 69 KB Jan 31, 2013
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB Feb 17, 2015
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB Aug 14, 2012