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NAT RapidIO Gen2 MicroTCA Carrier Hub

The NAT-MCH is the 3rd generation of a MicroTCA (MTCA) Carrier Hub (MCH) in the form factor of a single width Advanced Mezzanine Card (AMC) in either mid or full size. The MCH provides the central management and data switching entity for all MTCA systems, in essence, Serial RapidIO® (S-RIO) Gen2, 1 or 10 Gbps Ethernet (XAUI), PCI Express® (PCIe®) and. Optionally, the NAT-MCH also provides a centralized clock distribution to all AMCs in a system. 

The NAT-MCH supports the 2nd generation of S-RIO switches providing bandwidths up to 20Gbps. Systems being based on S-RIO can utilize major advantages, i.e., peer memory access and low latency, and thus are dedicated to any application in the communication, aerospace and defence, medical or industrial market. It also supports PCIe Gen2. 

Using the CX4 or SFP+ fat pipe uplinks at the front panel for S-RIO and XAUI the NAT-MCH offers the possibility to interconnect chassis. 

Due to its modular design the NAT-MCH allows customers to build full scalable MicroTCA systems by selecting the required and omitting the non-required features offered by the MicroTCA and AMC standards 

S-RIO Hub Module Details

The NAT-MCH can be equipped with a Serial RapidIO daughter board to support point-to-point connectivity between up to 12 AMC modules in a single chassis. Chassis can be interconnected using the optional uplink ports at the front panel of the MCH. The S-RIO hub supports x1 and x4 fat pipe transport density with the industry's lowest power, lowest latency and best peer to peer processor clustering. For an S-RIO example, this is accomplished by using IDT device CPS-1848. 

While the 1st generation of the S-RIO standard supports up to 10Gbps of bandwidth, the 2nd generation doubles the throughput per lane to 20 Gbps, extending its physical layer to support 5.0 Gbaud and 6.25 Gbaud lane rates. Thus the NAT-MCH can provide up to 20Gbps of usable bandwidth.

CPU, Memory, and OS

The NAT-MCH base board is equipped with a CPU of the Freescale™ ColdFire family of processors. The CPU operates at core frequency of 200 MHz. The NAT-MCH provides 32/64MB DDR2 RAM, 256kB SSDRAM and 16/32/64 MB FLASH memory. The operating system used with the NAT-MCH is OK1, N.A.T.'s field proven and optimized real-time kernel. Custom specific applications that require running onboard could be realized using Linux. 

Clock Distribution

Besides the PCIe clocks, the NAT-MCH also offers a sophisticated clock distribution module for special requirements. The module allows a flexible selection of the telecom and non-telecom clocking structures as defined in MTCA.0. The CLK module allows distributing all standard frequencies including clock signals at 1pps and GPS frequencies. The on-board Stratum 3 type PLL sources its clock reference configurable from either any of the 12 AMCs or from an external clock via one of the front panel BNC type connectors. The BNC connectors can also be used to extract a clock from the system to an external device. 


The NAT-MCH incorporates a MTCA Carrier Management Controller (MCMC) which supports and manages up 12 AMCs, 2 cooling units and up to 1 to 4 power modules. Special care has been taken to support numerous aspects of system architectures; that is, e-keying, redundancy, clocking, load sharing, fail-over scenarios or system integrity. In order to connect the MCH to an external shelf or system manager, a 1GbE port at the front panel of NAT-MCH can be used. The management interface and the available N.A.T. remote control and visualization application, NATview, are based on the open standard Remote Management Control Protocol (RMCP). 

The JAVA based GUI NATview offers options like Backplane Connectivity Viewer and the FRU Editor for adding or deleting multi-records. Enhanced debugging features also include the support of the power safe System Event Log (i.e., for post-mortem analysis). A copy of NATview-EASY is provided with every NAT-MCH at no cost. 

For more information about N.A.T., the NAT-MCH and other products by N.A.T., please visit


  • CPU and memory
    • Freescale ColdFire 547 x @ 200 MHz
    • DDR2 RAM: 32/64MB
    • SSDRAM: 256kB
    • FLASH: 16/32/64MB
  • IPMI and Compliance
    • PICMG® AMC.0
    • PICMG 2.9
    • Intel® IPMI v2.0
  • Fabric
    • Up to 12 AMCs and 2 uplinks
    • Base (Fabric A): 1GbE (PICMG AMC.2)
    • Fat Pipe (Fabrics D-G):
      • PCI Express (PICMG AMC.1)
      • XAUI/10GbE (PICMG AMC.2)
      • Serial RapidIO (PICMG AMC.4)
  • Clock distribution
    • Telecom: Stratum 3 PLL with reference from either 1 of the AMCs or external clock via front panel
    • PCI Express: Spread Spectrum Clock (100 MHz mean) or oscillator (100 MHz fixed)
  • Carrier manager
    • Management of up to 12 AMCs, 2 cooling units and 1-4 power modules, supports redundant architectures, fail-over procedure and load sharing
  • Shelf and system manager
    • For detached or stand-alone operation both managers are available on-board, hook-in for external managers via 1GbE port at front panel
  • Operating system and API
    • O/S:  OK1, Linux (opt.)
    • API:  IPMI and RMCP compliant, works with openHPI
  • Indicator LEDs
    • 4 standard AMC LEDs
    • 12 bi-color LEDs for AMC slot status
    • 2 bi-color LEDs for cooling units
    • 2 bi-color LEDs for power modules
  • Front panel connectors
    • 2 RJ45 (1GbE)
    • 2 BNC type (ext. CLK IN/OUT)
    • 1 USB (debug)
  • Form Factor
    • Mid size or full size front panel according to:
      • MTCA.0
      • MTCA.1
      • MTCA.4