The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.
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3.3V 256K x 36 Synchronous 3.3V I/O Flowthrough SRAM
Software & Tools
|Title||Other Languages||Type||Format||File Size||Date|
|71v67703_PF IBIS Model||-||Model - IBIS||ZIP||13 KB||Aug 14, 2000|